Dwarkesh Patel Podcast - Dylan Patel — Deep dive on the 3 big bottlenecks to scaling AI compute
What this covers
Dylan Patel, a semiconductor analyst, speaks with Dwarkesh Patel about what actually constrains the scaling of AI compute capacity. The conversation centers on a supply-chain argument: contrary to common assumptions about power availability or land, the real bottleneck is semiconductor manufacturing—specifically the production of EUV lithography tools made by ASML, which can manufacture only 70–100 units per year. This cap translates to a hard ceiling of roughly 200 GW of AI chip output by 2030, regardless of how much electricity or real estate becomes available. The discussion also establishes why firms that locked in long-term supply contracts early—principally Nvidia and OpenAI—have acquired decisive advantages in capacity and margin over more cautious competitors.
Patel walks through the physical and economic mechanics of this constraint. He explains why EUV tools are so difficult to scale: they are composed of four hyper-specialized subsystems requiring sub-nanometer precision, assembled by tiny skilled workforces in an artisanal, months-long process. He applies the Bullwhip Effect to show how labs, chip makers, and suppliers each under-order relative to downstream demand, creating cumulative delays that ensure supply falls far short of what AI labs collectively need. He also tackles why reverting to older process nodes doesn't solve the problem—newer chips like Blackwell deliver performance gains (up to 20x on inference) that far exceed what older nodes can replicate, because the gains compound across networking speed, memory bandwidth, and on-package communication. Patel argues that because chips are now the scarce resource, older GPUs like the H100 are worth more today than three years ago: their value is set by the high-quality tokens they produce in the present, not by newer chips' theoretical price-performance ratios. The conversation also covers DRAM supply delays, why switching to cheaper memory interfaces fails, the role of CoWoS packaging bottlenecks, and how Opportunity Cost dynamics reward early commitment while punishing conservative players like Anthropic.
Patel argues that scaling AI compute is ultimately bottlenecked not by power or data centers but by the semiconductor supply chain—specifically logic wafers, memory, and above all ASML's EUV tools—and that because compute is so scarce, an older GPU is worth more today than three years ago and whoever locked in long-term supply early (Nvidia, OpenAI) holds decisive margin and capacity advantages.
- ASML can only build ~70-100 EUV tools/year, capping AI chip output at ~200 GW/year by 2030 regardless of power or land availability.
- Because chips are the binding constraint, a Hopper GPU's value is set by the high-quality tokens it can produce today, not by newer chips' price-performance, so its value rose over time.
- Firms that signed long-term compute and supply contracts early (Nvidia for TSMC/memory; OpenAI for clouds) locked in huge margin and capacity advantages over conservative players like Anthropic and Google.
This asset isn't compiled yet
You're seeing its claims, ranked. Compile it to build the argument threads, weight them, and check each claim against your library — the full view.
ASML's tool has four hyper-complex subsystems (Cymer source, reticle stage, wafer stage, Zeiss optics) made by tiny, highly specialized workforces; production is artisanal (hundreds of tools, thousands of lenses per year), requires sub-nanometer movement accuracy for ~3nm overlay, and takes many months to assemble, ship, and reassemble—so output cannot be rapidly increased even with more capital.
“It’s quite artisanal in this sense because you’re not making tens of thousands of these a year, you’re making hundreds...There’s no way to just snap your fingers and increase production.”
Each link in the chain builds less than the next link actually needs—labs know they need X, Nvidia builds X-1, and suppliers build X-1 or X÷2—because they are not AGI-pilled; this creates a long time lag for the production whip to react, so even when suppliers think they're aggressively scaling (60 to 100 EUV tools), it falls far short of what labs like OpenAI, Anthropic, Google and Elon collectively demand.
“OpenAI and Anthropic know they need X. Nvidia is not quite as AGI-pilled. They’re building X - 1. You go down the supply chain, everyone’s doing X - 1. In some cases, they’re doing X ÷ 2”
A scale-up domain is the tight set of chips communicating at terabytes/second; Nvidia's NVL72 connects 72 GPUs all-to-all, Google's TPU pods reach thousands of chips but use a torus topology where each chip connects only to six neighbors (requiring bounce-through with resource blocking), and Amazon sits between them—while all three are migrating toward dragonfly topologies that mix fully- and partially-connected elements.
“A scale-up domain is this tight domain where the chips are communicating on the order of terabytes a second.”
Going back to 7nm chips is naive because the Hopper-to-Blackwell performance gulf (up to ~20x on real inference workloads like DeepSeek and Kimi K2.5) far exceeds the ~2-3x FLOPS difference, since models run across hundreds of chips and gains come cumulatively from networking speed, FLOPS per chip, memory bandwidth, and on-package vs cross-rack communication—many of which can't be replicated on older nodes.
“the performance difference between Hopper and Blackwell is on the order of 20x. It’s not 2x or 3x like the FLOPS performance difference indicates, even though those are on the same process node.”
Because semiconductors and deployment are so supply-limited, a GPU is not priced by the comparative new chip you could buy but by the value of work it can do today; since newer models like GPT-5.4 are cheaper to serve, higher quality, and have a far larger TAM than GPT-4, an H100 produces more valuable tokens and is therefore worth more today than three years ago.
“what actually prices these chips is not the comparative thing I can buy today, but rather what is the value I can derive out of this chip today.”
Regardless of hardware, labs favor smaller models because the compute-efficiency gains from research dwarf those from scale, and a smaller model can be RL'd faster (fewer/cheaper rollouts) and deployed back into research and development sooner, creating a compounding feedback loop toward faster takeoff—even though Google, with unipolar TPU compute, can afford to deploy a larger production model (Gemini Pro).
“in isolation, you almost always want to go with a smaller model that gets RL’d faster and gets deployed into research and development earlier.”
ASML is unusually generous: despite a monopoly on EUV with no competitor close, it has never raised tool prices more than it has increased capability (throughput, overlay accuracy)—tools went from ~$150M to ~$400M while capabilities more than doubled—always delivering net benefit to customers, unlike Nvidia or memory vendors who take the available margin.
“they haven’t taken price and margins up like crazy...ASML has never raised the price more than they’ve increased the capability of the tool.”
By the Alchian-Allen effect, adding a fixed cost (like rising GPU prices) to both higher- and lower-quality goods shrinks their price ratio, pushing buyers toward the higher-quality good; applied to AI, more expensive compute makes users willing to pay for the very best model since they're paying the fixed compute cost regardless.
“if there’s a fixed cost that is applied to both. Then the price difference between them, the ratio, changes. Previously, the more expensive one was 2X more expensive. Now it’s just 1.5X more expensive.”
Switching accelerators from HBM to commodity DDR to save wafers fails because chip I/O escapes only on the edges; an HBM4 stack delivers ~2.5 TB/s per ~13mm shoreline versus only ~64-128 GB/s for DDR in the same area—an order of magnitude less bandwidth—and since FLOPS are gated by feeding weights and KV cache, the metric that matters is bandwidth per wafer edge, not bits per wafer.
“the metric you actually care about is bandwidth per wafer, not bits per wafer.”
Even if every TSMC process engineer were airlifted out and the fabs destroyed in a Taiwan conflict, replicating that built-up capacity elsewhere would take years; incremental compute capacity would fall from hundreds of gigawatts/year toward just 10-20 GW across Intel and Samsung, massively shrinking (not just slowing) global GDP and leaving China with the strongest remaining vertically integrated supply chain.
“Instead of hundreds of gigawatts a year by the end of the decade, let’s say something happens to Taiwan, now you’re at maybe 10 gigawatts across Intel and Samsung, or 20 gigawatts. It’s nothing.”
If AI takeoff is fast, the US wins because its labs are scaling compute to ~10 GW each, distillation from American models gets harder as work moves from visible reasoning chains to opaque automated white-collar output, and ROIC on its ~$1T data-center CapEx compounds; but if AI takes longer to reach high capability, China can catch up by building a fully vertical indigenized supply chain while the West's middling returns leave it exposed.
“It’s fast timelines, the US wins; long timelines, China wins.”
As scaling continues, the bottleneck shifts from short-lead-time items (CoWoS, power, data centers) back to long-lead semiconductor supply chains, and ultimately to ASML, which makes the world's most complicated machine: an EUV tool selling for $300-400M, of which only ~70 can be made now, ~80 next year, and barely over 100 by decade's end even under aggressive expansion.
“ultimately by 2028 or 2029, the bottleneck falls to the lowest rung on the supply chain, which is ASML. ASML makes the world’s most complicated machine: an EUV tool.”
The memory crunch's near-term constraint is not EUV but that vendors didn't build fabs for years—they lost money on memory in 2023—so even after prices reflected reasoning/KV-cache demand (a year lag) and vendors began building (another 3-6 months), the two-year fab construction time means no meaningful new memory fabs come online until late 2027 or 2028.
“Over the last three to four years, these vendors have not built new fabs because memory prices were really low...So we won’t have really meaningful fabs to even put these tools in until late 2027 or 2028.”
Power will not be the binding US constraint because beyond the three combined-cycle gas turbine makers there are 16+ gas power-gen vendors plus aeroderivatives, medium-speed reciprocating engines, ship engines, fuel cells (Bloom), and solar-plus-battery; even doubling power cost to ~$3,500/kW only raises a GPU's TCO a few cents/hour, and utility-scale batteries could unlock ~20% of the terawatt-scale US grid that sits idle outside peak hours.
“Any of these individually will do tens of gigawatts, and as a whole, they will do hundreds of gigawatts.”
Space data centers don't make sense this decade because they don't escape the binding constraint (chip supply, ~200 GW/yr by 2030) and add huge costs: testing then shipping unreliable GPUs (15% of Blackwells need RMA) to orbit could cost ~6 months of a 5-year useful life—the most valuable months—while inter-satellite networking requires expensive, unreliable space lasers instead of high-volume pluggable transceivers.
“Space data centers effectively are not limited by their energy advantage. They are limited by the same contended resource.”
For millions of humanoids, most intelligence should live in the cloud—a capable model batch-processing at high efficiency does planning and long-horizon tasks, pushing commands to robots that interpolate actions and handle only local sensing like weight and force—because on-device compute can't batch, can't be as intelligent, and would divert scarce leading-edge low-power chips from AI data centers.
“you don’t need to have all the intelligence in the robot. It would be much more efficient to not do that. Because in the cloud, you can batch process”
In a compute-limited takeoff, firms with five-year compute contracts lock in a huge margin advantage because they hold compute at prices set years ago, while incremental new compute transacts at much higher value-priced rates; the share of the market in long-term contracts far exceeds the short-term flex capacity, so committing early wins.
“companies that don’t have commitment issues and have these five-year contracts for compute have locked in a humongous margin advantage. They’ve locked in compute for five years at the price it transacted at two, three, or five years ago.”
As a conservative company avoiding boom-bust cycles, TSMC gives better allocations to stable, lower-growth CPU business (Amazon's Graviton, AMD's CPUs) before allocating incremental capacity to volatile high-growth AI accelerators like Trainium, despite higher HPC margins.
“TSMC is much more excited to give allocation to Graviton than they are to Trainium because they view the CPU business as more stable, long-term growth.”
Elon's strength is recruiting elite people for crazy goals and garnering physical resources, so he can likely build a clean room for a million-wafer-a-month fab (taking a year or two), but his 'delete things, dirty is fine' mindset is wrong—fabs need extreme cleanliness with air replaced every three seconds—and he cannot quickly develop the deeply accumulated process technology that only TSMC, Intel and Samsung possess.
“I think he can build the clean room...The really complex part is actually developing a process technology and building wafers. I don’t think he can develop that quickly.”
Nvidia is getting the majority of TSMC 3nm supply not by special favor but because it sent the strongest, earliest market signal—non-cancelable, non-returnable orders with deposits—far ahead of Google and Amazon, whose chips also faced delays, while TSMC independently verified downstream supply (PCB, memory) could support Nvidia's volumes.
“Nvidia just did it way earlier than Google or Amazon. In some cases, Google and Amazon had stumbling blocks. One of the chips got delayed slightly by a couple quarters.”
Putting more dies per package (Blackwell's two, Rubin Ultra's four, Tesla's wafer-scale Dojo with 25, Huawei Ascend's progression) is a path to higher in-package bandwidth that works on older nodes too; Huawei leans on packaging scaling because it can't shrink process, and anything done on 7nm packaging can also be done on 3nm.
“you will see a trend line of more chips on the package, and yes, you’re going to be able to do that on 7 nm.”
A gigawatt of Nvidia Rubin capacity needs ~55,000 wafers of 3nm (with ~20 EUV passes each, ~1.1M passes), plus 5nm and 170,000 DRAM wafers, totaling ~2 million EUV passes; at 75 wafers/hour and ~90% uptime, that requires about 3.5 EUV tools (~$1.2B) to underpin ~$50B of data-center CapEx and ~$100B of AI value.
“you need about three and a half EUV tools to do the 2 million EUV wafer passes for the gigawatt. So three and a half EUV tools satisfies a gigawatt.”
H100 rental prices have inflected upward, with some AI labs signing two-to-three-year deals as high as $2.40/hour for Hopper even though it costs ~$1.40/hour to build over five years—margins far above the original ~35%—because rolling-off short-term contracts let willing buyers crowd out other suppliers.
“People are willing to sign long-term deals for above $2 even. I’ve seen deals where certain AI labs...have signed at as high as $2.40 for two to three years for H100s.”
Anthropic was conservative on compute commitments to avoid bankruptcy risk, while OpenAI signed aggressive deals across many providers (CoreWeave, Oracle, SoftBank Energy, NScale); as a result OpenAI has far more compute access by year end, and Anthropic now must use lower-quality providers or pay revenue-share markups to catch up.
“But in reality, he’s screwed the pooch compared to OpenAI, whose approach was, “Let’s just sign these crazy fucking deals.””
TSMC's ecosystem already has ~250-300 EUV tools; adding ~70/80/100 per year reaches ~700 by decade's end, which at 3.5 tools per gigawatt could support ~200 gigawatts of AI chips per year—making Sam Altman's 52 GW/year goal a reasonable ~25% share, though some capacity still goes to mobile and PC.
“You’re at 700 EUV tools by the end of the decade. 700 EUV tools, at three and a half tools per gigawatt...gets you to 200 gigawatts worth of AI chips”
Huawei is arguably the only company with all the legs—cracked software, networking, AI talent, its own fabs, top concentrated China talent, and an end token market—so had it not been banned from TSMC in 2019 it would likely already be TSMC's biggest customer and, with 3nm access, could plausibly build a better accelerator than Nvidia's Rubin.
“Huawei is arguably the only company in the world that has all the legs. Huawei has cracked software engineers. Huawei has cracked networking technologies.”
Anthropic could already offer a 'slow mode' cutting Opus 4.6 price 4-5x for only ~2x slowdown, but doesn't because no one wants a slow model—high-value agentic tasks are time-sensitive, so running slower turns hours of work into a day, which users won't accept.
“They could probably reduce the price of Opus 4.6 by 4-5x and reduce the speed by maybe just 2x...And yet they don’t, because no one actually wants to use a slow model.”
China does not yet have a fully indigenized semiconductor supply chain—all its 7nm and 14nm capacity uses ASML DUV tools—so the scale advantage remains with the West plus Taiwan, Japan and Korea; by 2030 China will likely fully indigenize DUV and have working EUV tools, but not yet mass-produce them since production hell takes years.
“to date, all of China’s 7 nm and 14 nm capacity uses ASML DUV tools.”
Building 200 GW/year strains labor (electricians, plumbers), so the main solution is modularization—shipping fully integrated power, cooling, and server-row 'skids' built in Asian factories—plus importing high-skilled labor and eventually robots, drastically cutting on-site cabling and headcount so build capacity can scale.
“the main factor for reducing the number of people is going to be modularizing things and making them in factories in Asia.”
TSMC won't kick Apple off N2; instead, as AI customers prepay and fund capacity expansion, Apple becomes a smaller share of TSMC's ballooning revenue, gets allocated 'X minus one' (losing flex capacity), and is increasingly treated like any ordinary customer required to pre-book and prepay—while AI becomes the first customer on the newer A16 node rather than Apple.
“I don’t think TSMC would kick out Apple. I think Apple will become a smaller and smaller percentage of TSMC’s revenue, and therefore be less relevant”
3D DRAM (analogous to 3D NAND) is very likely to arrive by the end of the decade or early next, still using EUV for tighter overlay but dramatically increasing bits per EUV pass; it would lower EUV demand as a share of wafer cost but require massive fab retooling, since you can't quickly convert a logic, DRAM, or NAND fab between roles.
“what 3D would do is change the calculation of how many bits a single EUV pass can make. That number would go up drastically if you go to 3D DRAM.”
Rising memory prices will push smartphone volumes down from ~1.1B toward ~800M this year and ~500-600M next year, concentrated in low and mid-range where memory is a larger share of BOM and margins are thinner; since cuts hit the low end disproportionately, DRAM is freed for AI while high-end phones (Apple) absorb only modest BOM increases (~$150-250 per iPhone).
“Our projections are that we might drop to 800 million this year, and down to 500 or 600 million next year.”
The ~$600B of hyperscaler CapEx (or ~$1T across the supply chain) does not all buy compute coming online this year; large chunks are forward setup spending—turbine deposits for '28/'29, data center construction for '27, power purchase agreement down payments—to enable fast future scaling.
“When you look at Google having $180 billion, a big chunk of that is spent on turbine deposits for ‘28 and ‘29. A chunk of that is spent on data center construction for ‘27.”
Anthropic's compute team (ex-Google) spotted the demand inflection before Google's leadership did and negotiated to buy roughly a million Ironwood (TPU v7) chips; TPU capacity at TSMC spiked multiple times over six weeks largely to serve Anthropic, before Nano Banana and Gemini 3 woke Google up to its own demand—by which point TSMC was sold out.
“They saw this dislocation, they negotiated a deal, and they were able to get access to this compute before Google realized.”
Almost every SemiAnalysis client tells Dylan its forecasts are too high—hyperscalers, labs, and even semiconductor firms repeatedly disbelieve the numbers until they prove correct months later—while Leopold is essentially the only client who consistently insists the numbers are too low, reflecting his higher conviction about AGI takeoff.
“Leopold jokes that he’s the only client of mine who tells me our numbers are too low. Everyone else tells me our numbers are too high, almost ad nauseam.”
Just as early movers bought up turbine capacity and now charge premiums, someone could pay ASML a billion dollars to be first in line for ten EUV tools and resell the option at a premium once others realize capacity is short—effectively telling ASML it under-priced—but ASML, unlike turbine makers, likely won't agree because EUV tools are far scarcer and it won't trust random buyers.
“You arbitrage this by locking up the capacity, doing a forward contract, and then trying to sell it at a later date once other people realize everything is fucked and we don’t have enough capacity.”
Elon signed a large deal with Samsung to fab his robot chips in Texas because he likely views Taiwan risk as huge; this gives geopolitical and supply-chain diversification (Samsung has almost no other AI demand competing for it) and avoids competing against the infinite willingness to pay for data-center compute on TSMC.
“He signed this massive deal with Samsung to make his robot chips in Texas because I personally think he thinks Taiwan risk is huge.”
If Anthropic adds ~$6B of revenue per month, it implies ~$60B of revenue over ten months, requiring ~$40B of inference compute, which at ~$10B/GW means it needs to add about four gigawatts of inference capacity just to grow revenue, pushing it well above five gigawatts by year end—a tough but possible target.
“That $40 billion of compute, at roughly $10 billion a gigawatt in rental costs, means they need to add four gigawatts of inference capacity just to grow revenue.”